Front-end,4 to 10 yrs Experience- Sasken,Bangalore

Posted on July 26, 2007. Filed under: Front-end |

Job title: Front-end
Exp: 4 – 10 yrs

* Verification of a fullchip or Gate level verification, Formal Verification, Scripting, programming
* Experience in Verilog, VHDL, Modelsim or any Digital design simulator
* SOC Verification, Frontend verification Knowledge of VERA / SPECMAN is a big PLUS .

If you interested Click Here

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